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stm32f1xx_it.c 13KB

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  1. /* USER CODE BEGIN Header */
  2. /**
  3. ******************************************************************************
  4. * @file stm32f1xx_it.c
  5. * @brief Interrupt Service Routines.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2023 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under Ultimate Liberty license
  13. * SLA0044, the "License"; You may not use this file except in compliance with
  14. * the License. You may obtain a copy of the License at:
  15. * www.st.com/SLA0044
  16. *
  17. ******************************************************************************
  18. */
  19. /* USER CODE END Header */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "main.h"
  22. #include "stm32f1xx_it.h"
  23. /* Private includes ----------------------------------------------------------*/
  24. /* USER CODE BEGIN Includes */
  25. /* USER CODE END Includes */
  26. /* Private typedef -----------------------------------------------------------*/
  27. /* USER CODE BEGIN TD */
  28. /* USER CODE END TD */
  29. /* Private define ------------------------------------------------------------*/
  30. /* USER CODE BEGIN PD */
  31. /* USER CODE END PD */
  32. /* Private macro -------------------------------------------------------------*/
  33. /* USER CODE BEGIN PM */
  34. /* USER CODE END PM */
  35. /* Private variables ---------------------------------------------------------*/
  36. /* USER CODE BEGIN PV */
  37. /* USER CODE END PV */
  38. /* Private function prototypes -----------------------------------------------*/
  39. /* USER CODE BEGIN PFP */
  40. /* USER CODE END PFP */
  41. /* Private user code ---------------------------------------------------------*/
  42. /* USER CODE BEGIN 0 */
  43. /* USER CODE END 0 */
  44. /* External variables --------------------------------------------------------*/
  45. extern TIM_HandleTypeDef htim1;
  46. /* USER CODE BEGIN EV */
  47. /* USER CODE END EV */
  48. /******************************************************************************/
  49. /* Cortex-M3 Processor Interruption and Exception Handlers */
  50. /******************************************************************************/
  51. /**
  52. * @brief This function handles Non maskable interrupt.
  53. */
  54. void NMI_Handler(void)
  55. {
  56. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  57. /* USER CODE END NonMaskableInt_IRQn 0 */
  58. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  59. while (1)
  60. {
  61. }
  62. /* USER CODE END NonMaskableInt_IRQn 1 */
  63. }
  64. /**
  65. * @brief This function handles Hard fault interrupt.
  66. */
  67. __WEAK void HardFault_Handler(void)
  68. {
  69. /* USER CODE BEGIN HardFault_IRQn 0 */
  70. /* USER CODE END HardFault_IRQn 0 */
  71. while (1)
  72. {
  73. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  74. /* USER CODE END W1_HardFault_IRQn 0 */
  75. }
  76. }
  77. /**
  78. * @brief This function handles Memory management fault.
  79. */
  80. void MemManage_Handler(void)
  81. {
  82. /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  83. /* USER CODE END MemoryManagement_IRQn 0 */
  84. while (1)
  85. {
  86. /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
  87. /* USER CODE END W1_MemoryManagement_IRQn 0 */
  88. }
  89. }
  90. /**
  91. * @brief This function handles Prefetch fault, memory access fault.
  92. */
  93. void BusFault_Handler(void)
  94. {
  95. /* USER CODE BEGIN BusFault_IRQn 0 */
  96. /* USER CODE END BusFault_IRQn 0 */
  97. while (1)
  98. {
  99. /* USER CODE BEGIN W1_BusFault_IRQn 0 */
  100. /* USER CODE END W1_BusFault_IRQn 0 */
  101. }
  102. }
  103. /**
  104. * @brief This function handles Undefined instruction or illegal state.
  105. */
  106. void UsageFault_Handler(void)
  107. {
  108. /* USER CODE BEGIN UsageFault_IRQn 0 */
  109. /* USER CODE END UsageFault_IRQn 0 */
  110. while (1)
  111. {
  112. /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
  113. /* USER CODE END W1_UsageFault_IRQn 0 */
  114. }
  115. }
  116. /**
  117. * @brief This function handles Debug monitor.
  118. */
  119. void DebugMon_Handler(void)
  120. {
  121. /* USER CODE BEGIN DebugMonitor_IRQn 0 */
  122. /* USER CODE END DebugMonitor_IRQn 0 */
  123. /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  124. /* USER CODE END DebugMonitor_IRQn 1 */
  125. }
  126. /******************************************************************************/
  127. /* STM32F1xx Peripheral Interrupt Handlers */
  128. /* Add here the Interrupt Handlers for the used peripherals. */
  129. /* For the available peripheral interrupt handler names, */
  130. /* please refer to the startup file (startup_stm32f1xx.s). */
  131. /******************************************************************************/
  132. /**
  133. * @brief This function handles TIM1 update interrupt.
  134. */
  135. void TIM1_UP_IRQHandler(void)
  136. {
  137. /* USER CODE BEGIN TIM1_UP_IRQn 0 */
  138. /* USER CODE END TIM1_UP_IRQn 0 */
  139. HAL_TIM_IRQHandler(&htim1);
  140. /* USER CODE BEGIN TIM1_UP_IRQn 1 */
  141. /* USER CODE END TIM1_UP_IRQn 1 */
  142. }
  143. /* USER CODE BEGIN 1 */
  144. struct exception_stack_frame
  145. {
  146. rt_uint32_t r0;
  147. rt_uint32_t r1;
  148. rt_uint32_t r2;
  149. rt_uint32_t r3;
  150. rt_uint32_t r12;
  151. rt_uint32_t lr;
  152. rt_uint32_t pc;
  153. rt_uint32_t psr;
  154. };
  155. struct stack_frame
  156. {
  157. #if USE_FPU
  158. rt_uint32_t flag;
  159. #endif /* USE_FPU */
  160. /* r4 ~ r11 register */
  161. rt_uint32_t r4;
  162. rt_uint32_t r5;
  163. rt_uint32_t r6;
  164. rt_uint32_t r7;
  165. rt_uint32_t r8;
  166. rt_uint32_t r9;
  167. rt_uint32_t r10;
  168. rt_uint32_t r11;
  169. struct exception_stack_frame exception_stack_frame;
  170. };
  171. struct exception_info
  172. {
  173. rt_uint32_t exc_return;
  174. struct stack_frame stack_frame;
  175. };
  176. #include <stdbool.h>
  177. #include <stdint.h>
  178. #if defined(__ARMCC_VERSION)
  179. /* C stack block name, default is STACK */
  180. #ifndef CMB_CSTACK_BLOCK_NAME
  181. #define CMB_CSTACK_BLOCK_NAME Image$$ARM_LIB_STACK$$ZI
  182. #endif
  183. /* code section name, default is ER_IROM1 */
  184. #ifndef CMB_CODE_SECTION_NAME
  185. #define CMB_CODE_SECTION_NAME FLASH_CODE
  186. #endif
  187. #elif defined(__ICCARM__)
  188. /* C stack block name, default is 'CSTACK' */
  189. #ifndef CMB_CSTACK_BLOCK_NAME
  190. #define CMB_CSTACK_BLOCK_NAME "CSTACK"
  191. #endif
  192. /* code section name, default is '.text' */
  193. #ifndef CMB_CODE_SECTION_NAME
  194. #define CMB_CODE_SECTION_NAME ".text"
  195. #endif
  196. #elif defined(__GNUC__)
  197. /* C stack block start address, defined on linker script file, default is _sstack */
  198. #ifndef CMB_CSTACK_BLOCK_START
  199. #define CMB_CSTACK_BLOCK_START _sstack
  200. #endif
  201. /* C stack block end address, defined on linker script file, default is _estack */
  202. #ifndef CMB_CSTACK_BLOCK_END
  203. #define CMB_CSTACK_BLOCK_END _estack
  204. #endif
  205. /* code section start address, defined on linker script file, default is _stext */
  206. #ifndef CMB_CODE_SECTION_START
  207. #define CMB_CODE_SECTION_START _stext
  208. #endif
  209. /* code section end address, defined on linker script file, default is _etext */
  210. #ifndef CMB_CODE_SECTION_END
  211. #define CMB_CODE_SECTION_END _etext
  212. #endif
  213. #else
  214. #error "not supported compiler"
  215. #endif
  216. #if __STDC_VERSION__ < 199901L
  217. #error "must be C99 or higher. try to add '-std=c99' to compile parameters"
  218. #endif
  219. #if defined(__CC_ARM)
  220. #define SECTION_START(_name_) _name_##$$Base
  221. #define SECTION_END(_name_) _name_##$$Limit
  222. #define IMAGE_SECTION_START(_name_) Image$$##_name_##$$Base
  223. #define IMAGE_SECTION_END(_name_) Image$$##_name_##$$Limit
  224. #define CSTACK_BLOCK_START(_name_) SECTION_START(_name_)
  225. #define CSTACK_BLOCK_END(_name_) SECTION_END(_name_)
  226. #define CODE_SECTION_START(_name_) IMAGE_SECTION_START(_name_)
  227. #define CODE_SECTION_END(_name_) IMAGE_SECTION_END(_name_)
  228. extern const int CSTACK_BLOCK_START(CMB_CSTACK_BLOCK_NAME);
  229. extern const int CSTACK_BLOCK_END(CMB_CSTACK_BLOCK_NAME);
  230. extern const int CODE_SECTION_START(CMB_CODE_SECTION_NAME);
  231. extern const int CODE_SECTION_END(CMB_CODE_SECTION_NAME);
  232. #elif defined(__ICCARM__)
  233. #pragma section=CMB_CSTACK_BLOCK_NAME
  234. #pragma section=CMB_CODE_SECTION_NAME
  235. #elif defined(__GNUC__)
  236. extern const int CMB_CSTACK_BLOCK_START;
  237. extern const int CMB_CSTACK_BLOCK_END;
  238. extern const int CMB_CODE_SECTION_START;
  239. extern const int CMB_CODE_SECTION_END;
  240. #else
  241. #error "not supported compiler"
  242. #endif
  243. static bool is_in_text(uint32_t addr)
  244. {
  245. #if 0
  246. uint32_t code_start_addr = (uint32_t)&CODE_SECTION_START(CMB_CODE_SECTION_NAME);
  247. uint32_t code_size = (uint32_t)&CODE_SECTION_END(CMB_CODE_SECTION_NAME) - code_start_addr;
  248. #else
  249. uint32_t code_start_addr = (uint32_t)__section_begin(CMB_CODE_SECTION_NAME);
  250. uint32_t code_size = (uint32_t)__section_end(CMB_CODE_SECTION_NAME) - code_start_addr;
  251. #endif
  252. if (code_start_addr < addr && addr <= code_start_addr + code_size)
  253. {
  254. return true;
  255. }
  256. return false;
  257. }
  258. static bool disassembly_ins_is_bl_blx(uint32_t addr)
  259. {
  260. #define BL_INS_MASK 0xF800
  261. #define BL_INS_HIGH 0xF800
  262. #define BL_INS_LOW 0xF000
  263. #define BLX_INX_MASK 0xFF00
  264. #define BLX_INX 0x4700
  265. uint16_t ins1 = *((uint16_t *)addr);
  266. uint16_t ins2 = *((uint16_t *)(addr + 2));
  267. if ((ins2 & BL_INS_MASK) == BL_INS_HIGH && (ins1 & BL_INS_MASK) == BL_INS_LOW)
  268. {
  269. return true;
  270. }
  271. else if ((ins2 & BLX_INX_MASK) == BLX_INX)
  272. {
  273. return true;
  274. }
  275. else
  276. {
  277. return false;
  278. }
  279. }
  280. void rt_hw_hard_fault_exception(struct exception_info *exception_info)
  281. {
  282. //struct exception_stack_frame *exception_stack = &exception_info->stack_frame.exception_stack_frame;
  283. struct stack_frame *context = &exception_info->stack_frame;
  284. rt_kprintf("psr: 0x%08x\n", context->exception_stack_frame.psr);
  285. rt_kprintf("r00: 0x%08x\n", context->exception_stack_frame.r0);
  286. rt_kprintf("r01: 0x%08x\n", context->exception_stack_frame.r1);
  287. rt_kprintf("r02: 0x%08x\n", context->exception_stack_frame.r2);
  288. rt_kprintf("r03: 0x%08x\n", context->exception_stack_frame.r3);
  289. rt_kprintf("r04: 0x%08x\n", context->r4);
  290. rt_kprintf("r05: 0x%08x\n", context->r5);
  291. rt_kprintf("r06: 0x%08x\n", context->r6);
  292. rt_kprintf("r07: 0x%08x\n", context->r7);
  293. rt_kprintf("r08: 0x%08x\n", context->r8);
  294. rt_kprintf("r09: 0x%08x\n", context->r9);
  295. rt_kprintf("r10: 0x%08x\n", context->r10);
  296. rt_kprintf("r11: 0x%08x\n", context->r11);
  297. rt_kprintf("r12: 0x%08x\n", context->exception_stack_frame.r12);
  298. rt_kprintf(" lr: 0x%08x\n", context->exception_stack_frame.lr);
  299. rt_kprintf(" pc: 0x%08x\n", context->exception_stack_frame.pc);
  300. rt_kprintf("use command: addr2line -e your.out -a -f ");
  301. rt_kprintf("%08x ", context->exception_stack_frame.pc);
  302. rt_kprintf("%08x ", context->exception_stack_frame.lr);
  303. uint32_t lr;
  304. uint32_t pc;
  305. uint32_t *app_sp = (unsigned int *)(exception_info + 1); // 得到栈顶;
  306. for(int i = 0; i < 1024; i++)
  307. {
  308. lr = *app_sp;
  309. app_sp++;
  310. if ((lr & 0x01) && true == is_in_text(lr))
  311. {
  312. pc = (lr & ~0x01) - 4;
  313. if (true == disassembly_ins_is_bl_blx(pc))
  314. {
  315. rt_kprintf("%08x ", pc);
  316. }
  317. }
  318. }
  319. while(1);
  320. }
  321. void svc_exception(struct exception_info *exception_info)
  322. {
  323. //struct exception_stack_frame *exception_stack = &exception_info->stack_frame.exception_stack_frame;
  324. struct stack_frame *context = &exception_info->stack_frame;
  325. unsigned int addr;
  326. unsigned short swi_inst;
  327. unsigned int *old_sp;
  328. unsigned int value;
  329. /* 取出swi指令 */
  330. addr = context->exception_stack_frame.pc;
  331. addr -= 2;
  332. swi_inst = *((unsigned short *)addr);
  333. rt_kprintf("swi_inst = 0x%04x\n", swi_inst);
  334. swi_inst = swi_inst & 0xff;
  335. /* 分析swi指令 */
  336. old_sp = (unsigned int *)(exception_info + 1); // 得到栈顶
  337. unsigned int *p_reg = &context->exception_stack_frame.r0; // 得到r0的地址
  338. if (swi_inst == 0xff)
  339. {
  340. /* POP {PC} */
  341. value = *old_sp;
  342. old_sp++;
  343. context->exception_stack_frame.pc = value;
  344. }
  345. else
  346. {
  347. for (int i = 0; i < 8; i ++)
  348. {
  349. if (swi_inst & (1 << i))
  350. {
  351. /* POP {r0, PC} */
  352. value = *old_sp;
  353. old_sp++;
  354. p_reg[i] = value; // 哪个寄存器就保存哪个值
  355. /* POP {PC} */
  356. value = *old_sp;
  357. old_sp++;
  358. context->exception_stack_frame.pc = value;
  359. }
  360. }
  361. }
  362. rt_kprintf("old_sp = 0x%0x\n", old_sp);
  363. rt_kprintf("context->exception_stack_frame.pc= 0x%0x\n", context->exception_stack_frame.pc);
  364. /* 模拟swi指令 */
  365. struct exception_info stack_frame = *exception_info;
  366. unsigned int old_pos = (unsigned int)(exception_info + 1);
  367. unsigned int new_pos = (unsigned int)old_sp;
  368. unsigned int offset = new_pos - old_pos;
  369. exception_info = (struct exception_info *)((unsigned int)exception_info + offset);
  370. *exception_info = stack_frame;
  371. /* 返回 */
  372. }
  373. /* USER CODE END 1 */
  374. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/