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stm32f1xx_it.c 13KB

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  1. /* USER CODE BEGIN Header */
  2. /**
  3. ******************************************************************************
  4. * @file stm32f1xx_it.c
  5. * @brief Interrupt Service Routines.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2023 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under Ultimate Liberty license
  13. * SLA0044, the "License"; You may not use this file except in compliance with
  14. * the License. You may obtain a copy of the License at:
  15. * www.st.com/SLA0044
  16. *
  17. ******************************************************************************
  18. */
  19. /* USER CODE END Header */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "main.h"
  22. #include "stm32f1xx_it.h"
  23. /* Private includes ----------------------------------------------------------*/
  24. /* USER CODE BEGIN Includes */
  25. /* USER CODE END Includes */
  26. /* Private typedef -----------------------------------------------------------*/
  27. /* USER CODE BEGIN TD */
  28. /* USER CODE END TD */
  29. /* Private define ------------------------------------------------------------*/
  30. /* USER CODE BEGIN PD */
  31. /* USER CODE END PD */
  32. /* Private macro -------------------------------------------------------------*/
  33. /* USER CODE BEGIN PM */
  34. /* USER CODE END PM */
  35. /* Private variables ---------------------------------------------------------*/
  36. /* USER CODE BEGIN PV */
  37. /* USER CODE END PV */
  38. /* Private function prototypes -----------------------------------------------*/
  39. /* USER CODE BEGIN PFP */
  40. /* USER CODE END PFP */
  41. /* Private user code ---------------------------------------------------------*/
  42. /* USER CODE BEGIN 0 */
  43. /* USER CODE END 0 */
  44. /* External variables --------------------------------------------------------*/
  45. extern TIM_HandleTypeDef htim1;
  46. /* USER CODE BEGIN EV */
  47. /* USER CODE END EV */
  48. /******************************************************************************/
  49. /* Cortex-M3 Processor Interruption and Exception Handlers */
  50. /******************************************************************************/
  51. /**
  52. * @brief This function handles Non maskable interrupt.
  53. */
  54. void NMI_Handler(void)
  55. {
  56. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  57. /* USER CODE END NonMaskableInt_IRQn 0 */
  58. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  59. while (1)
  60. {
  61. }
  62. /* USER CODE END NonMaskableInt_IRQn 1 */
  63. }
  64. /**
  65. * @brief This function handles Hard fault interrupt.
  66. */
  67. #if 0
  68. void HardFault_Handler(void)
  69. {
  70. /* USER CODE BEGIN HardFault_IRQn 0 */
  71. /* USER CODE END HardFault_IRQn 0 */
  72. while (1)
  73. {
  74. /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  75. /* USER CODE END W1_HardFault_IRQn 0 */
  76. }
  77. }
  78. #endif
  79. /**
  80. * @brief This function handles Memory management fault.
  81. */
  82. void MemManage_Handler(void)
  83. {
  84. /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  85. /* USER CODE END MemoryManagement_IRQn 0 */
  86. while (1)
  87. {
  88. /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
  89. /* USER CODE END W1_MemoryManagement_IRQn 0 */
  90. }
  91. }
  92. /**
  93. * @brief This function handles Prefetch fault, memory access fault.
  94. */
  95. void BusFault_Handler(void)
  96. {
  97. /* USER CODE BEGIN BusFault_IRQn 0 */
  98. /* USER CODE END BusFault_IRQn 0 */
  99. while (1)
  100. {
  101. /* USER CODE BEGIN W1_BusFault_IRQn 0 */
  102. /* USER CODE END W1_BusFault_IRQn 0 */
  103. }
  104. }
  105. /**
  106. * @brief This function handles Undefined instruction or illegal state.
  107. */
  108. void UsageFault_Handler(void)
  109. {
  110. /* USER CODE BEGIN UsageFault_IRQn 0 */
  111. /* USER CODE END UsageFault_IRQn 0 */
  112. while (1)
  113. {
  114. /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
  115. /* USER CODE END W1_UsageFault_IRQn 0 */
  116. }
  117. }
  118. /**
  119. * @brief This function handles Debug monitor.
  120. */
  121. void DebugMon_Handler(void)
  122. {
  123. /* USER CODE BEGIN DebugMonitor_IRQn 0 */
  124. /* USER CODE END DebugMonitor_IRQn 0 */
  125. /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  126. /* USER CODE END DebugMonitor_IRQn 1 */
  127. }
  128. /******************************************************************************/
  129. /* STM32F1xx Peripheral Interrupt Handlers */
  130. /* Add here the Interrupt Handlers for the used peripherals. */
  131. /* For the available peripheral interrupt handler names, */
  132. /* please refer to the startup file (startup_stm32f1xx.s). */
  133. /******************************************************************************/
  134. /**
  135. * @brief This function handles TIM1 update interrupt.
  136. */
  137. void TIM1_UP_IRQHandler(void)
  138. {
  139. /* USER CODE BEGIN TIM1_UP_IRQn 0 */
  140. /* USER CODE END TIM1_UP_IRQn 0 */
  141. HAL_TIM_IRQHandler(&htim1);
  142. /* USER CODE BEGIN TIM1_UP_IRQn 1 */
  143. /* USER CODE END TIM1_UP_IRQn 1 */
  144. }
  145. /* USER CODE BEGIN 1 */
  146. struct exception_stack_frame
  147. {
  148. rt_uint32_t r0;
  149. rt_uint32_t r1;
  150. rt_uint32_t r2;
  151. rt_uint32_t r3;
  152. rt_uint32_t r12;
  153. rt_uint32_t lr;
  154. rt_uint32_t pc;
  155. rt_uint32_t psr;
  156. };
  157. struct stack_frame
  158. {
  159. #if USE_FPU
  160. rt_uint32_t flag;
  161. #endif /* USE_FPU */
  162. /* r4 ~ r11 register */
  163. rt_uint32_t r4;
  164. rt_uint32_t r5;
  165. rt_uint32_t r6;
  166. rt_uint32_t r7;
  167. rt_uint32_t r8;
  168. rt_uint32_t r9;
  169. rt_uint32_t r10;
  170. rt_uint32_t r11;
  171. struct exception_stack_frame exception_stack_frame;
  172. };
  173. struct exception_info
  174. {
  175. rt_uint32_t exc_return;
  176. struct stack_frame stack_frame;
  177. };
  178. #include <stdbool.h>
  179. #include <stdint.h>
  180. #if defined(__ARMCC_VERSION)
  181. /* C stack block name, default is STACK */
  182. #ifndef CMB_CSTACK_BLOCK_NAME
  183. #define CMB_CSTACK_BLOCK_NAME Image$$ARM_LIB_STACK$$ZI
  184. #endif
  185. /* code section name, default is ER_IROM1 */
  186. #ifndef CMB_CODE_SECTION_NAME
  187. #define CMB_CODE_SECTION_NAME FLASH_CODE
  188. #endif
  189. #elif defined(__ICCARM__)
  190. /* C stack block name, default is 'CSTACK' */
  191. #ifndef CMB_CSTACK_BLOCK_NAME
  192. #define CMB_CSTACK_BLOCK_NAME "CSTACK"
  193. #endif
  194. /* code section name, default is '.text' */
  195. #ifndef CMB_CODE_SECTION_NAME
  196. #define CMB_CODE_SECTION_NAME ".text"
  197. #endif
  198. #elif defined(__GNUC__)
  199. /* C stack block start address, defined on linker script file, default is _sstack */
  200. #ifndef CMB_CSTACK_BLOCK_START
  201. #define CMB_CSTACK_BLOCK_START _sstack
  202. #endif
  203. /* C stack block end address, defined on linker script file, default is _estack */
  204. #ifndef CMB_CSTACK_BLOCK_END
  205. #define CMB_CSTACK_BLOCK_END _estack
  206. #endif
  207. /* code section start address, defined on linker script file, default is _stext */
  208. #ifndef CMB_CODE_SECTION_START
  209. #define CMB_CODE_SECTION_START _stext
  210. #endif
  211. /* code section end address, defined on linker script file, default is _etext */
  212. #ifndef CMB_CODE_SECTION_END
  213. #define CMB_CODE_SECTION_END _etext
  214. #endif
  215. #else
  216. #error "not supported compiler"
  217. #endif
  218. #if __STDC_VERSION__ < 199901L
  219. #error "must be C99 or higher. try to add '-std=c99' to compile parameters"
  220. #endif
  221. #if defined(__CC_ARM)
  222. #define SECTION_START(_name_) _name_##$$Base
  223. #define SECTION_END(_name_) _name_##$$Limit
  224. #define IMAGE_SECTION_START(_name_) Image$$##_name_##$$Base
  225. #define IMAGE_SECTION_END(_name_) Image$$##_name_##$$Limit
  226. #define CSTACK_BLOCK_START(_name_) SECTION_START(_name_)
  227. #define CSTACK_BLOCK_END(_name_) SECTION_END(_name_)
  228. #define CODE_SECTION_START(_name_) IMAGE_SECTION_START(_name_)
  229. #define CODE_SECTION_END(_name_) IMAGE_SECTION_END(_name_)
  230. extern const int CSTACK_BLOCK_START(CMB_CSTACK_BLOCK_NAME);
  231. extern const int CSTACK_BLOCK_END(CMB_CSTACK_BLOCK_NAME);
  232. extern const int CODE_SECTION_START(CMB_CODE_SECTION_NAME);
  233. extern const int CODE_SECTION_END(CMB_CODE_SECTION_NAME);
  234. #elif defined(__ICCARM__)
  235. #pragma section=CMB_CSTACK_BLOCK_NAME
  236. #pragma section=CMB_CODE_SECTION_NAME
  237. #elif defined(__GNUC__)
  238. extern const int CMB_CSTACK_BLOCK_START;
  239. extern const int CMB_CSTACK_BLOCK_END;
  240. extern const int CMB_CODE_SECTION_START;
  241. extern const int CMB_CODE_SECTION_END;
  242. #else
  243. #error "not supported compiler"
  244. #endif
  245. static bool is_in_text(uint32_t addr)
  246. {
  247. #if 0
  248. uint32_t code_start_addr = (uint32_t)&CODE_SECTION_START(CMB_CODE_SECTION_NAME);
  249. uint32_t code_size = (uint32_t)&CODE_SECTION_END(CMB_CODE_SECTION_NAME) - code_start_addr;
  250. #else
  251. uint32_t code_start_addr = (uint32_t)__section_begin(CMB_CODE_SECTION_NAME);
  252. uint32_t code_size = (uint32_t)__section_end(CMB_CODE_SECTION_NAME) - code_start_addr;
  253. #endif
  254. if (code_start_addr < addr && addr <= code_start_addr + code_size)
  255. {
  256. return true;
  257. }
  258. return false;
  259. }
  260. static bool disassembly_ins_is_bl_blx(uint32_t addr)
  261. {
  262. #define BL_INS_MASK 0xF800
  263. #define BL_INS_HIGH 0xF800
  264. #define BL_INS_LOW 0xF000
  265. #define BLX_INX_MASK 0xFF00
  266. #define BLX_INX 0x4700
  267. uint16_t ins1 = *((uint16_t *)addr);
  268. uint16_t ins2 = *((uint16_t *)(addr + 2));
  269. if ((ins2 & BL_INS_MASK) == BL_INS_HIGH && (ins1 & BL_INS_MASK) == BL_INS_LOW)
  270. {
  271. return true;
  272. }
  273. else if ((ins2 & BLX_INX_MASK) == BLX_INX)
  274. {
  275. return true;
  276. }
  277. else
  278. {
  279. return false;
  280. }
  281. }
  282. void rt_hw_hard_fault_exception(struct exception_info *exception_info)
  283. {
  284. //struct exception_stack_frame *exception_stack = &exception_info->stack_frame.exception_stack_frame;
  285. struct stack_frame *context = &exception_info->stack_frame;
  286. rt_kprintf("psr: 0x%08x\n", context->exception_stack_frame.psr);
  287. rt_kprintf("r00: 0x%08x\n", context->exception_stack_frame.r0);
  288. rt_kprintf("r01: 0x%08x\n", context->exception_stack_frame.r1);
  289. rt_kprintf("r02: 0x%08x\n", context->exception_stack_frame.r2);
  290. rt_kprintf("r03: 0x%08x\n", context->exception_stack_frame.r3);
  291. rt_kprintf("r04: 0x%08x\n", context->r4);
  292. rt_kprintf("r05: 0x%08x\n", context->r5);
  293. rt_kprintf("r06: 0x%08x\n", context->r6);
  294. rt_kprintf("r07: 0x%08x\n", context->r7);
  295. rt_kprintf("r08: 0x%08x\n", context->r8);
  296. rt_kprintf("r09: 0x%08x\n", context->r9);
  297. rt_kprintf("r10: 0x%08x\n", context->r10);
  298. rt_kprintf("r11: 0x%08x\n", context->r11);
  299. rt_kprintf("r12: 0x%08x\n", context->exception_stack_frame.r12);
  300. rt_kprintf(" lr: 0x%08x\n", context->exception_stack_frame.lr);
  301. rt_kprintf(" pc: 0x%08x\n", context->exception_stack_frame.pc);
  302. rt_kprintf("use command: addr2line -e your.out -a -f ");
  303. rt_kprintf("%08x ", context->exception_stack_frame.pc);
  304. rt_kprintf("%08x ", context->exception_stack_frame.lr);
  305. uint32_t lr;
  306. uint32_t pc;
  307. uint32_t *app_sp = (unsigned int *)(exception_info + 1); // 得到栈顶;
  308. for(int i = 0; i < 1024; i++)
  309. {
  310. lr = *app_sp;
  311. app_sp++;
  312. if ((lr & 0x01) && true == is_in_text(lr))
  313. {
  314. pc = (lr & ~0x01) - 4;
  315. if (true == disassembly_ins_is_bl_blx(pc))
  316. {
  317. rt_kprintf("%08x ", pc);
  318. }
  319. }
  320. }
  321. while(1);
  322. }
  323. void svc_exception(struct exception_info *exception_info)
  324. {
  325. //struct exception_stack_frame *exception_stack = &exception_info->stack_frame.exception_stack_frame;
  326. struct stack_frame *context = &exception_info->stack_frame;
  327. unsigned int addr;
  328. unsigned short swi_inst;
  329. unsigned int *old_sp;
  330. unsigned int value;
  331. /* 取出swi指令 */
  332. addr = context->exception_stack_frame.pc;
  333. addr -= 2;
  334. swi_inst = *((unsigned short *)addr);
  335. rt_kprintf("swi_inst = 0x%04x\n", swi_inst);
  336. swi_inst = swi_inst & 0xff;
  337. /* 分析swi指令 */
  338. old_sp = (unsigned int *)(exception_info + 1); // 得到栈顶
  339. unsigned int *p_reg = &context->exception_stack_frame.r0; // 得到r0的地址
  340. if (swi_inst == 0xff)
  341. {
  342. /* POP {PC} */
  343. value = *old_sp;
  344. old_sp++;
  345. context->exception_stack_frame.pc = value;
  346. }
  347. else
  348. {
  349. for (int i = 0; i < 8; i ++)
  350. {
  351. if (swi_inst & (1 << i))
  352. {
  353. /* POP {r0, PC} */
  354. value = *old_sp;
  355. old_sp++;
  356. p_reg[i] = value; // 哪个寄存器就保存哪个值
  357. /* POP {PC} */
  358. value = *old_sp;
  359. old_sp++;
  360. context->exception_stack_frame.pc = value;
  361. }
  362. }
  363. }
  364. rt_kprintf("old_sp = 0x%0x\n", old_sp);
  365. rt_kprintf("context->exception_stack_frame.pc= 0x%0x\n", context->exception_stack_frame.pc);
  366. /* 模拟swi指令 */
  367. struct exception_info stack_frame = *exception_info;
  368. unsigned int old_pos = (unsigned int)(exception_info + 1);
  369. unsigned int new_pos = (unsigned int)old_sp;
  370. unsigned int offset = new_pos - old_pos;
  371. exception_info = (struct exception_info *)((unsigned int)exception_info + offset);
  372. *exception_info = stack_frame;
  373. /* 返回 */
  374. }
  375. /* USER CODE END 1 */
  376. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/