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armv7m.c 12KB

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  1. /*
  2. * Copyright (c) 2025, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2025-08-16 Rbb666 first version
  9. */
  10. #include "coredump.h"
  11. #include "registers.h"
  12. #define FPU_CPACR 0xE000ED88
  13. int is_vfp_addressable(void)
  14. {
  15. uint32_t reg_cpacr = *((volatile uint32_t *)FPU_CPACR);
  16. if (reg_cpacr & 0x00F00000)
  17. return 1;
  18. else
  19. return 0;
  20. }
  21. #if defined(__CC_ARM)
  22. /* clang-format off */
  23. __asm void mcd_mini_dump()
  24. {
  25. extern get_cur_core_regset_address;
  26. extern get_cur_fp_regset_address;
  27. extern mcd_mini_dump_ops;
  28. extern mcd_gen_coredump;
  29. extern is_vfp_addressable;
  30. PRESERVE8
  31. push {r7, lr}
  32. sub sp, sp, #24
  33. add r7, sp, #0
  34. get_regset
  35. bl get_cur_core_regset_address
  36. str r0, [r0, #0]
  37. add r0, r0, #4
  38. stmia r0!, {r1 - r12}
  39. mov r1, sp
  40. add r1, #32
  41. str r1, [r0, #0]
  42. ldr r1, [sp, #28]
  43. str r1, [r0, #4]
  44. mov r1, pc
  45. str r1, [r0, #8]
  46. mrs r1, xpsr
  47. str r1, [r0, #12]
  48. bl is_vfp_addressable
  49. cmp r0, #0
  50. beq get_reg_done
  51. bl get_cur_fp_regset_address
  52. vstmia r0!, {d0 - d15}
  53. vmrs r1, fpscr
  54. str r1, [r0, #0]
  55. get_reg_done
  56. mov r0, r7
  57. bl mcd_mini_dump_ops
  58. mov r0, r7
  59. bl mcd_gen_coredump
  60. nop
  61. adds r7, r7, #24
  62. mov sp, r7
  63. pop {r7, pc}
  64. nop
  65. nop
  66. }
  67. __asm void mcd_multi_dump(void)
  68. {
  69. extern get_cur_core_regset_address;
  70. extern get_cur_fp_regset_address;
  71. extern mcd_rtos_thread_ops;
  72. extern mcd_gen_coredump;
  73. extern is_vfp_addressable;
  74. PRESERVE8
  75. push {r7, lr}
  76. sub sp, sp, #24
  77. add r7, sp, #0
  78. get_regset1
  79. bl get_cur_core_regset_address
  80. str r0, [r0, #0]
  81. add r0, r0, #4
  82. stmia r0!, {r1 - r12}
  83. mov r1, sp
  84. add r1, #32
  85. str r1, [r0, #0]
  86. ldr r1, [sp, #28]
  87. str r1, [r0, #4]
  88. mov r1, pc
  89. str r1, [r0, #8]
  90. mrs r1, xpsr
  91. str r1, [r0, #12]
  92. bl is_vfp_addressable
  93. cmp r0, #0
  94. beq get_reg_done
  95. bl get_cur_fp_regset_address
  96. vstmia r0!, {d0 - d15}
  97. vmrs r1, fpscr
  98. str r1, [r0, #0]
  99. get_reg_done1
  100. mov r0, r7
  101. bl mcd_rtos_thread_ops
  102. mov r0, r7
  103. bl mcd_gen_coredump
  104. nop
  105. adds r7, r7, #24
  106. mov sp, r7
  107. pop {r7, pc}
  108. nop
  109. nop
  110. }
  111. #elif 1 //defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) || defined(__GNUC__)
  112. #define mcd_get_regset(regset) \
  113. __asm volatile(" mov r0, %0 \n" \
  114. " str r0, [r0 , #0] \n" \
  115. " add r0, r0, #4 \n" \
  116. " stmia r0!, {r1 - r12} \n" \
  117. " mov r1, sp \n" \
  118. " str r1, [r0, #0] \n" \
  119. " mov r1, lr \n" \
  120. " str r1, [r0, #4] \n" \
  121. " mov r1, pc \n" \
  122. " str r1, [r0, #8] \n" \
  123. " mrs r1, xpsr \n" \
  124. " str r1, [r0, #12] \n" ::"r"(regset) \
  125. : "memory", "cc");
  126. #define mcd_get_fpregset(regset) \
  127. __asm volatile(" mov r0, %0 \n" \
  128. " vstmia r0!, {d0 - d15} \n" \
  129. " vmrs r1, fpscr \n" \
  130. " str r1, [r0, #0] \n" ::"r"(regset) \
  131. : "memory", "cc");
  132. // 不更新当前寄存器到全局变量(在异常中断中已填充)
  133. void mcd_hard_fault_exception_dump(void)
  134. {
  135. struct thread_info_ops ops;
  136. mcd_rtos_thread_ops(&ops);
  137. mcd_gen_coredump(&ops);
  138. }
  139. // 只保存当前线程或非线程(主栈):更新当前寄存器到全局变量
  140. void mcd_mini_dump(void)
  141. {
  142. struct thread_info_ops ops;
  143. mcd_get_regset((uint32_t *)get_cur_core_regset_address());
  144. #if MCD_FPU_SUPPORT
  145. if (is_vfp_addressable())
  146. mcd_get_fpregset((uint32_t *)get_cur_fp_regset_address());
  147. #endif
  148. mcd_mini_dump_ops(&ops);
  149. mcd_gen_coredump(&ops);
  150. }
  151. // 保存RTOS所有线程:更新当前寄存器到全局变量
  152. void mcd_multi_dump(void)
  153. {
  154. struct thread_info_ops ops;
  155. mcd_get_regset((uint32_t *)get_cur_core_regset_address());
  156. #if MCD_FPU_SUPPORT
  157. if (is_vfp_addressable())
  158. mcd_get_fpregset((uint32_t *)get_cur_fp_regset_address());
  159. #endif
  160. mcd_rtos_thread_ops(&ops);
  161. mcd_gen_coredump(&ops);
  162. }
  163. #endif
  164. /**
  165. * @brief Collect ARM Cortex-M4 registers from RT-Thread stack frame
  166. *
  167. * This function extracts register values from the stack frame created by
  168. * RT-Thread's context switch mechanism (PendSV_Handler) or exception handling.
  169. *
  170. * RT-Thread Stack Frame Layout (from low to high memory address):
  171. * +-------------------+ <- stack_top (input parameter)
  172. * | FPU flag | (4 bytes, if MCD_FPU_SUPPORT enabled)
  173. * +-------------------+
  174. * | r4 | (4 bytes, software saved)
  175. * | r5 | (4 bytes, software saved)
  176. * | r6 | (4 bytes, software saved)
  177. * | r7 | (4 bytes, software saved)
  178. * | r8 | (4 bytes, software saved)
  179. * | r9 | (4 bytes, software saved)
  180. * | r10 | (4 bytes, software saved)
  181. * | r11 | (4 bytes, software saved)
  182. * +-------------------+
  183. * | FPU s16-s31 | (64 bytes, if FPU context active)
  184. * +-------------------+
  185. * | r0 | (4 bytes, hardware saved)
  186. * | r1 | (4 bytes, hardware saved)
  187. * | r2 | (4 bytes, hardware saved)
  188. * | r3 | (4 bytes, hardware saved)
  189. * | r12 | (4 bytes, hardware saved)
  190. * | lr | (4 bytes, hardware saved)
  191. * | pc | (4 bytes, hardware saved)
  192. * | xpsr | (4 bytes, hardware saved)
  193. * +-------------------+
  194. * | FPU s0-s15 | (64 bytes, if FPU context active)
  195. * | FPSCR | (4 bytes, if FPU context active)
  196. * | NO_NAME | (4 bytes, if FPU context active)
  197. * +-------------------+ <- current SP after context save
  198. *
  199. * @param stack_top Pointer to the beginning of the stack frame (FPU flag position)
  200. * @param core_regset Pointer to structure for storing ARM core registers
  201. * @param fp_regset Pointer to structure for storing FPU registers
  202. */
  203. void collect_registers_armv7m(uint32_t *stack_top, core_regset_type *core_regset, fp_regset_type *fp_regset)
  204. {
  205. /*
  206. * This function uses the same stack frame parsing approach as collect_registers_armv7ms
  207. * for consistency. Both PendSV_Handler and HardFault_Handler now use identical
  208. * stacking order after the modifications.
  209. *
  210. * Expected stack layout starting from stack_top:
  211. * [FPU flag] -> [r4-r11] -> [FPU s16-s31] -> [exception frame] -> [FPU s0-s15,FPSCR]
  212. */
  213. uint32_t *current_ptr = stack_top;
  214. /* Clear both register sets first to ensure clean state */
  215. mcd_memset(core_regset, 0, sizeof(core_regset_type));
  216. mcd_memset(fp_regset, 0, sizeof(fp_regset_type));
  217. #if MCD_FPU_SUPPORT
  218. /* Read FPU flag first - indicates if FPU context was saved */
  219. uint32_t fpu_flag = *current_ptr++;
  220. #endif
  221. /* Extract core registers r4-r11 (software saved by RT-Thread) */
  222. core_regset->r4 = *current_ptr++;
  223. core_regset->r5 = *current_ptr++;
  224. core_regset->r6 = *current_ptr++;
  225. core_regset->r7 = *current_ptr++;
  226. core_regset->r8 = *current_ptr++;
  227. core_regset->r9 = *current_ptr++;
  228. core_regset->r10 = *current_ptr++;
  229. core_regset->r11 = *current_ptr++;
  230. #if MCD_FPU_SUPPORT
  231. /* If FPU context is active, s16-s31 registers are saved after r4-r11 */
  232. if (fpu_flag)
  233. {
  234. /* Copy FPU s16-s31 registers (software saved by RT-Thread) */
  235. for (int i = 16; i < 32; i++)
  236. {
  237. ((uint32_t *)fp_regset)[i] = *current_ptr++;
  238. }
  239. }
  240. #endif
  241. /* Extract hardware exception frame (automatically saved by ARM Cortex-M) */
  242. core_regset->r0 = *current_ptr++;
  243. core_regset->r1 = *current_ptr++;
  244. core_regset->r2 = *current_ptr++;
  245. core_regset->r3 = *current_ptr++;
  246. core_regset->r12 = *current_ptr++;
  247. core_regset->lr = *current_ptr++;
  248. core_regset->pc = *current_ptr++;
  249. core_regset->xpsr = *current_ptr++;
  250. #if MCD_FPU_SUPPORT
  251. /* If FPU context is active, s0-s15 and FPSCR are saved after exception frame */
  252. if (fpu_flag)
  253. {
  254. /* Copy FPU s0-s15 registers (hardware saved by ARM Cortex-M) */
  255. for (int i = 0; i < 16; i++)
  256. {
  257. ((uint32_t *)fp_regset)[i] = *current_ptr++;
  258. }
  259. /* Copy FPSCR register (FPU status and control) */
  260. fp_regset->fpscr = *current_ptr++;
  261. /* Skip NO_NAME field (reserved/alignment) */
  262. current_ptr++;
  263. }
  264. #endif
  265. /* SP should point to the current stack pointer position after all saved data */
  266. core_regset->sp = (uintptr_t)current_ptr;
  267. }
  268. /**
  269. * @brief ARM Cortex-M specific hard fault exception handler for MCoreDump
  270. *
  271. * This function handles ARM Cortex-M specific stack frame processing when a
  272. * hard fault occurs. It calculates the proper stack pointer position and
  273. * extracts register context for coredump generation.
  274. *
  275. * HardFault Stack Frame Layout (created by HardFault_Handler):
  276. * +-------------------+ <- Exception occurs here
  277. * | Hardware Exception| (32 bytes: r0,r1,r2,r3,r12,lr,pc,xpsr)
  278. * | Stack Frame | (+ optional 72 bytes FPU: s0-s15,FPSCR,NO_NAME)
  279. * +-------------------+ <- context parameter points here
  280. * | r11 | (4 bytes, software saved in HardFault_Handler)
  281. * | r10 | (4 bytes, software saved in HardFault_Handler)
  282. * | ... | (...)
  283. * | r4 | (4 bytes, software saved in HardFault_Handler)
  284. * +-------------------+
  285. * | FPU s31 | (4 bytes, if FPU context active)
  286. * | FPU s30 | (4 bytes, if FPU context active)
  287. * | ... | (...)
  288. * | FPU s16 | (4 bytes, if FPU context active)
  289. * +-------------------+
  290. * | FPU flag | (4 bytes, if MCD_FPU_SUPPORT enabled)
  291. * +-------------------+
  292. * | EXC_RETURN | (4 bytes, contains exception return information)
  293. * +-------------------+ <- Final stack pointer position
  294. *
  295. * @param context Pointer to exception_stack_frame from HardFault_Handler
  296. * @return int Always returns -1 to indicate fault condition
  297. */
  298. int armv7m_hard_fault_exception_hook(void *context)
  299. {
  300. /*
  301. * context points to exception_stack_frame created by HardFault_Handler.
  302. * We need to calculate the complete stack frame position to extract all registers.
  303. * Since HardFault_Handler now uses the same stacking order as PendSV_Handler,
  304. * we can directly use collect_registers_armv7m function.
  305. */
  306. #if 0
  307. struct exception_stack_frame *exception_stack = (struct exception_stack_frame *)context;
  308. /* Calculate stack pointer to the beginning of the saved context */
  309. uint32_t *stack_ptr = (uint32_t *)exception_stack;
  310. /*
  311. * Move backward through the stack to reach the beginning of saved context.
  312. * Stack layout (working backwards from exception_stack):
  313. * exception_stack -> r4-r11 (8 words) -> [s16-s31] -> [fpu_flag] -> [exc_return]
  314. */
  315. stack_ptr -= 8; /* Move backward 8 uint32_t positions to reach r4 */
  316. #if MCD_FPU_SUPPORT
  317. /* Point to FPU flag position (collect_registers_armv7m expects this as start) */
  318. stack_ptr -= 1; /* fpu flag */
  319. #else
  320. /* If no FPU support, skip EXC_RETURN and point to r4 directly */
  321. stack_ptr -= 1; /* exc_return */
  322. #endif
  323. #else
  324. uint32_t *stack_ptr = context;
  325. stack_ptr += 1; /* 跳过:exc_return */
  326. // stack_ptr += 1; // 如开启fpuflag
  327. #endif
  328. //extern void DumpCore(void *sp);
  329. //DumpCore(stack_ptr);
  330. /*
  331. * Now stack_ptr points to where collect_registers_armv7m expects:
  332. * - With FPU: points to FPU flag (first field to be read)
  333. * - Without FPU: points to r4 (first register to be read)
  334. */
  335. collect_registers_armv7m(stack_ptr,
  336. get_cur_core_regset_address(),
  337. get_cur_fp_regset_address());
  338. /* Generate coredump using memory mode */
  339. mcd_faultdump(MCD_OUTPUT_FAULT_SERIAL);
  340. return 0;
  341. }